The present invention relates to a field effect transistor (FET) used for a power amplifier and, more particularly, to an FET comprising a stabilization circuit between a connecting portion of a gate electrode and a source electrode.
A power amplifier with an FET is required the FET to be stabilized, without oscillating in a frequency range in which the power amplifier is used. Therefore, the typical power amplifier includes a stabilization circuit in order to stabilize the FET.
FIG. 9 shows a circuit diagram of a conventional power amplifier comprising an external stabilization circuit 34. As shown in the drawing, an input matching circuit 32 is connected to an input terminal of the FET 31, and an output matching circuit 33 is connected to its output terminal. An external stabilization circuit 34 is connected between a gate electrode and the input matching circuit 32 of the FET 31, so that the power amplifier is stabilized. The external stabilization circuit 34 is designed according to a measurement of S parameters of the FET 31.
In this arrangement, an input matching circuit 32 as well as the external stabilization circuit 34 are formed in the circuit of the power amplifier. In this instance, the external stabilization circuit 34 can be arranged close to other circuit elements. This results in an interaction between the external stabilization circuit 34 designed according to the S parameters interact with other circuit elements to dissatisfy the stabilization requirements, which disadvantageously causes oscillation the FET 31.